The invention relates to improved subsurface zener diodes that are compatible with standard bipolar integrated circuit wafer fabrication processes.
In certain integrated circuit applications, circuits capable of producing reference voltages with low uncompensated thermal drift, very low noise performance, and very high stability with respect to time are essential. This last characteristic avoids the requirement for burn-in processes which otherwise may be necessary to ensure stable operation. Zener diodes that carry their current at or very close to the semiconductor surface exhibit both high values of low frequency noise voltage and unstable voltage performance with respect to time. Subsurface zener diode junctions do not have such undesirable characteristics. There has been a long search in the industry for integrated circuit zener diodes that are capable of being used to produce such reference voltages. Up to now, no prior zener diode that can be fabricated using standard bipolar integrated circuit wafer fabrication processes has been entirely satisfactory. Where extremely low thermal drift reference voltages are needed, it has been necessary for circuit designers to resort to often complex reference circuits known as band gap circuits. U.S. Pat. Nos. 4,325,017, 4,249,122, 4,339,707, and 4,064,448, including 4,524,318 (by one of the present inventors) disclose exemplary of state-of-the-art band gap circuits that are needed to provide adequately stable reference voltages in certain circuit applications.
The state-of-the-art for low noise, stable subsurface integrated circuit compatible zener diodes is shown in U.S. Pat. No. 4,127,859 (Nelson). Other higher noise, less stable subsurface zener diodes are disclosed in U.S. Pat. No. 3,881,179 (Howard, Jr.), U.S. Pat. No. 4,136,349 (Tsang), and U.S. Pat. No. 4,213,806 (Tsang). The above-mentioned Nelson reference discloses the best available subsurface integrated circuit although it is a great compatible zener diode which, a improvement over prior subsurface integrated circuit zener diodes, has several shortcomings. A major or shortcoming we have discovered of the device shown in the Nelson reference is that it teaches that the edges of the N.sup.+ region must be disposed within the center P.sup.+ region 22 such that the edges of emitter region 27 stop short of the edges of outer P.sup.+ regions 23. We have found that this characteristic of the subsurface zener diode structure shown in the Nelson reference results in lower surface breakdown voltage for the zener diode than is desired and also results in higher series zener resistance than is desirable. This combination of effects limits the amount of current that can flow through the zener diode of the Nelson reference before the onset of surface breakdown, as the voltage developed across the zener resistance as a result of the current flowing through the zener resistance in addition to the subsurface breakdown voltage is applied across the surface portion of the zener junction. Another shortcoming of the Nelson device is that more surface area of the integrated circuit chip is required than is desirable in order to provide an N.sup.+ N.sup.- contact to the N.sup.- epitaxial region in which the subsurface zener diode is fabricated, in order to reverse bias the N.sup.- epitaxial region. Another shortcoming is that use of the structure and technique disclosed in the Nelson reference requires that close masking tolerance be provided between the N.sup.+ "emitter" diffusions and the P.sup.+ "isolation" diffusions during manufacture of integrated circuits containing the Nelson zener diode structure. While this does not usually present much difficulty in low-volume, engineering-oriented semiconductor wafer fabrication facilities, those skilled in the art know that in state-of-the-art full scale bipolar integrated circuit high volume production facilities, any tight masking tolerance (i.e., alignment tolerance between different IC masking layers) invariably lowers the manufacturing yield of the integrated circuits produced thereby. It is not customary in standard circuit bipolar manufacturing processes to have to maintain precise mask alignment tolerances between N.sup.+ "emitter" type diffusions and P.sup.+ isolation type diffusions.
It would be desirable to have an integrated circuit subsurface zener diode that has higher surface breakdown voltage, lower noise at higher currents, and lower internal series impedance than the structure disclosed in the Nelson reference, and which also requires less chip surface area to fabricate the zener diode, requires looser masking tolerances, and provides higher manufacturing yields.